Tuesday, July 8 |
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Opening:
9:00 -- 9:30, Room A
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Invited
Talk: 9:30 - 10:30, Room A Chair: Steve Wallach The Characteristics of the Uniprocessor in Future Supercomputers Yale N. Patt, Univ. of Michigan, MI, USA |
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Coffee Break: 10:30 - 11:00
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Session
1a: 11:00 - 12:00, Room A Instruction-Level Parallelism and Wide-Busses Chair: Trevor Mudge |
Session
1b: 11:00 - 12:00, Room B Collective I/O Chair: Peter Brezany |
Scalable
Instruction-Level Parallelism Through Tree Instructions Jaime H. Moreno and Mayan Moudgill IBM T. J. Watson Research Center, Yorktown Heights, NY, USA |
Implementation
of Collective I/O in the Intel Paragon Parallel File System: Initial
Experiences Rajesh Bordawekar California Institute of Technology, Pasadena, CA, USA |
Increasing
Memory Bandwidth With Wide Buses: Compiler, Hardware and Performance
Trade-Offs David Lopez, Mateo Valero, Josep Llosa, and Eduard Ayguade Univ. Politecnica de Catalunya, Barcelona, Spain |
Optimizing
Collective I/O Performance on Parallel Computers: A Multisystem
Study Ying Chen*, Ian Foster***, Jarek Nieplocha**, and Marianne Winslett* *Univ. of Illinois, Urbana, IL, USA; **Pacific Northwest National Lab., Richland, WA, USA; ***Argonne National Lab., Argonne, IL, USA |
Invited
Talk: 12:00 -- 12:30, Room A Chair: Hans Zima HPCN in the ESPRIT Programme Khalil Rouhana, European Commission, Brussels | |
Lunch Break: 12:30 - 14:00
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Session
2a: 14:00 - 15:30, Room A Applications / Scheduling Chair: Christoph Ueberhuber |
Session
2b: 14:00 - 15:30, Room B Caches Chair: Josep Torrellas |
Performance
Improvement Through Overhead Analysis: A Case Study in Molecular
Dynamics Graham D. Riley, J. Mark Bull, and John R. Gurd University of Manchester, UK |
Data
Caches for Superscalar Processors Toni Juan, Juan J. Navarro, Olivier Temam* Univ. Politecnica de Catalunya, Barcelona, Spain; *Versailles Univ., France |
Generalized
Cannon's Algorithm for Parallel Matrix Multiplication Hyuk-Jae Lee, James P. Robertson, and Jose A.B. Fortes Louisiana Tech. Univ., Ruston, LA, USA |
Improving
Data Cache Performance by Pre-Executing Instructions Under a Cache
Miss James Dundas and Trevor Mudge Univ. of Michigan, Ann Arbor, MI, USA |
Multiprocessor
Scheduling with Client Resources to Improve the Response Time of WWW
Applications Daniel Andresen and Tao Yang University of California, Santa Barbara, CA, USA |
Eliminating
Cache Conflict Misses Through XOR-Based Placement Functions Antonio Gonzalez, Mateo Valero, Nigel Topham* and Joan M. Parcerisa Univ. Politecnica de Catalunya, Barcelona, Spain; *Univ. of Edinburgh, UK |
Coffee Break: 15:30 - 16:00
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Panel
Session: 16:00 - 18:00, Room A Debate: On The Relative Merits Of Parallel Programming Using a Single-Address-Space Model Versus Message-Passing Between Multiple Address Spaces Chair: John Gurd, Univ. of Manchester, UK |
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Reception
- City of Vienna (City Hall): 20:00
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Wednesday, July 9 |
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Invited
Talk: 8:30 - 9:30, Room A Chair: Ralf Hofestädt Computers in the Drug Discovery Cycle Hwa Lim, Pangea Systems Inc., Oakland, CA, USA |
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Session
3: 9:30 - 10:30, Room A Parallel Architectures Chair: Mateo Valero | |
pSNOW: A Tool to Evaluate Architectural Issues for NOW Environments Mangesh Kasbekar, Shailabh Nagar, Anand Sivasubramaniam Pennsylvania State Univ., PA, USA |
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CP-PACS:
A Massively Parallel Processor For Large Scale Scientific
Calculations T. Boku, K. Itakura, H. Nakamura and K. Nakazawa Univ. of Tsukuba, Japan | |
Coffee
Break: 10:30 - 11:00
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Session
4a: 11:00 - 12:00, Room A Object-Oriented Programming Chair: Piyush Mehrotra |
Session
4b: 11:00 - 12:00, Room B Routing Chair: Alok Choudhary |
A
Methodology for Specifying Data Distribution Using Only Standard
Object-Oriented Features Naohito Sato, Satoshi Matsuoka, Jean-Marc Jezequel, Akinori Yonezawa Univ. of Tokyo, Japan |
Impact
of Selection Functions on Routing Algorithm Performance in Multicomputer
Networks Wu-chang Feng, Kang G. Shin Univ. of Michigan, Ann Arbor, MI, USA |
HPC++:
Experiments with the Parallel Standard Template Library Elizabeth Johnson, Dennis Gannon, and Peter Beckman* Indiana Univ., Bloomington, IN, USA; *Los Alamos National Lab., NM, USA |
Performance
Benefits of Virtual Channels And Adaptive Routing: An Application-Driven
Study Aniruddba S. Vaidya, Anand Sivasubramaniam, and Chita R. Das Pennsylvania State Univ., PA, USA |
Lunch Break: 12:00 - 14:00
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Session
5a: 14:00 - 15:30, Room A Synchronization Chair: Michael Gerndt |
Session
5b: 14:00 - 15:30, Room B Performance Chair: Thomas Fahringer |
A
Graph Based Approach to Barrier Synchronisation Minimisation E.A. Stöhr and Michael F. P. O'Boyle Univ. of Manchester, UK |
Performance
Evaluation of Message-Driven Parallel VLSI CAD Applications on General Purpose
Multiprocessors John G. Holm, John A. Chandy*, Steven Parkes*, Sumit Roy, Venkatram Krishnaswamy, Gagan Hasteer, and Prithviraj Banerjee** University of Illinois, Urbana, IL, USA; *Sierra Vista Research, Los Gatos, CA, USA; **Northwestern University, Evanston, IL, USA |
The
Importance of Synchronization Structure in Parallel Program
Optimization Arjan J.C. van Gemund Delft Univ. of Technology, The Netherlands |
Incorporating
Application Dependent Information In An Automatic Code Generating
Environment R. van Engelen, I. Heitlager, L. Wolters, and G. Cats* Leiden University, The Netherlands; *Royal Netherlands Meteorological Institute, Ae de Bilt, The Netherlands |
Sparse Code Generation for Imperfectly
Nested Loops With Dependencies Vladimir Kotlyar and Keshav Pingali Cornell University, Ithaca, NY, USA | |
Coffee Break: 15:30 - 16:00
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Panel
Session: 16:00 - 18:00, Room A Debate: On The Implementation Aspects of a Single-Address-Space Model Versus a Message-Passing Model As Seen From Independent Software Providers Chair: Frank Baetke, Hewlett Packard, Munich, Germany |
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Conference Dinner (Palais Pallavicini): 20:00
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Thursday, July 10 |
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Invited
Talk: 8:30 - 9:30, Room A Chair: Harry Wijshoff Problem Solving Environments and Netsolve: A Network Server for Solving Computational Science Problems Jack Dongarra, Univ. of Tennessee, Knoxville, TN, USA |
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Session
6a: 9:30 - 10:30, Room A Prefetching Chair: Yale Patt |
Session
6b: 9:30 - 10:30, Room B Communication and Multicasts Chair: Kourosh Gharachorloo |
Speculative
Execution Via Address Prediction and Data Prefetching Jose Gonzalez and Antonio Gonzalez Univ. Politecnica de Catalunya, Barcelona, Spain |
Performance
Considerations in Software Multicasts Jörg Cordsen, H.-W. Pohl, and Wolfgang Schröder-Preikschat* GMD-First Berlin, Germany; *Univ. of Potsdam, Germany |
Adaptive
Data Prefetching Using Cache Information Ando Ki, Alan Knowles Univ. of Manchester, UK |
Iteration
Space Slicing And Its Application To Communication Optimization William Pugh and Evan Rosser Univ. of Maryland, MD, USA |
Coffee Break: 10:30 - 11:00
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Session
7a: 11:00 - 12:00, Room A Tree-based and Semi-Structured Applications Chair: John Merlin |
Session
7b: 11:00 - 12:00, Room B Distributed Shared Memory Chair: Jim Smith |
Compiler
And Run-Time Support For Semi-Structured Applications Nikos Chrisochoides, Induprakas Kodukula, and Keshav Pingali Cornell University, Ithaca, NY, USA |
Design
and Performance of the Shasta Distributed Shared Memory Protocol Daniel J. Scales and Kourosh Gharachorloo Digital Western Research. Lab., Palo Alto, CA, USA |
Conflict-Free
Template Access in k-ary and Binomial Trees Sajal K. Das, Falguni Sarkar, and M.Christina Pinotti* University of North Texas, Denton, TX, USA; *IEI, Consiglio Nazionale delle Ricerche, Pisa, Italy |
An
I/O Network Architecture of the Distributed Shared-Memory Massively
Parallel Computer JUMP-1 H. Nakajo, S. Ohtani, T. Matsumoto, M. Kohata, K. Hiraki and Y. Kaneda Kobe Univ., Japan |
Lunch Break: 12:00 - 14:00
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Session
8a: 14:00 - 15:30, Room A Compilers Dennis Gannon |
Session
8b: 14:00 - 15:30, Room B Hardware Features for Performance Chair: Antonio Gonzalez |
Symbolic
Evaluation for Parallelizing Compilers Thomas Fahringer and Bernhard Scholz Univ. of Vienna, Austria; Vienna Univ. of Technology, Austria |
Implementation
and Analysis of Path History in Dynamic Branch Prediction Schemes Shlomo Reches, Shlomo Weiss Tel Aviv Univ., Israel |
A
Compiler Algorithm for Optimizing Locality in Loop Nests Mahmut T. Kandemir, J. Ramanujam, and Alok Choudhary Syracuse Univ., NY, USA; Louisiana State Univ., Baton Rouge, LA, USA; Northwestern Univ., Evanston, IL, USA |
A
Victim Cache for Vector Registers Roger Espasa, Mateo Valero Univ. Politecnica de Catalunya, Barcelona, Spain |
Compile-Time
Minimisation of Load Imbalance in Loop Nests Rizos Sakellariou and John R. Gurd Univ. of Manchester, UK |
The
Performance Impact of Exploiting Branch ILP with Tree Representation of ILP
Code Soo-Mook Moon, Kemal Ebcioglu Seoul Nat. Univ., South Korea; IBM T. J. Watson Research Center, Yorktown Heights, NY, USA |
Coffee Break: 15:30 - 16:00
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Industrial
Session: 16:00 - 18:00, Room A Chair: Erich Schikuta |
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Sightseeing
Tour and Heurigen Dinner: Departure 19:00 (Penta Hotel)
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Friday, July 11 |
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Invited Session: 8:30 - 10:30, Room A Chair: Jim Smith |
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Invited
Talk: 8:30 - 9:30 The Road to a Petaflops Computer Paul Smith, Department of Energy, Washington, DC, USA (Speaker) Martin Sokoloski, Science and Technology Corp., Hampton, VA, USA |
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Invited
Talk: 9:30 - 10:30 SPOCK: Rapid Product Development via Computer-Based Communication Stefan Rill, Daimler Benz Aerospace Airbus / Univ. of Bremen, Germany |
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Coffee Break: 10:30 - 11:00
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Session
9a: 11:00 - 12:30, Room A Data Placement and Transformation Chair: Jörg Cordsen |
Session
9b: 11:00 - 12:00, Room B Performance Prediction and Coding Chair: Jack Dongarra |
Non-singular
data transformations: Definition, Validity and Applications Michael F.P. O'Boyle and P.M.W Knijnenburg Univ. of Manchester, UK; Leiden Univ., The Netherlands |
Developing
Architecture Adaptive Algorithms using Simulation with MISS-PVM for Performance
Prediction Dieter F. Kvasnicka and Christoph W. Ueberhuber Vienna Univ. of Technology, Austria |
Cache
Miss Equations: An Analytical Representation of Cache Misses Somnath Ghosh, Margaret Martonosi, and Sharad Malik Princeton Univ., NJ, USA |
Optimizing
Matrix Multiply using PHiPAC: a Portable, High-Performance, ANSI C Coding
Methodology Jeff Bilmes, Krste Asanovic, Chee-Whye Chin, and Jim Demmel Univ. of California at Berkeley, CA, USA |
Adaptive
Migratory Scheme for Distributed Shared Memory Jai-Hoon Kim, Nitin H. Vaidya Texas A&M Univ., College Station, TX, USA |
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End
of Conference: 12:30
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Page last modified: July 3, 1997 (Bernd Wender)