ICS06 Program
16:00 Registration Cairns International Hotel
18:00 Reception Cairns International Hotel
8:00-8:30 Registration  
8:30-8:40 Welcome  
8:40-9:40 KeyNote 1 A Modern High-Performance Processor Pipeline
9:40-9:50 Coffee Break  
9:50-11:05 Session 1 Checkpointing & Speculation
    Experimental Evaluation of Application-level Checkpointing for OpenMP Programs
    Cooperative Checkpointing: A Robust Approach to Large-Scale Systems Reliability
    On the Performance Potential of Different Types of Speculative Thread-Level Parallelism
11:05-11:15 Coffee Break  
11:15-12:30 Session 2 Prediction
    BranchTap: Improving Performance with Very Few Checkpoints Through Adaptive Speculation Control
    Selective Predicate Prediction for Out-of-Order Processors
    Wide and Efficient Trace Prediction using the Local Trace Predictor
12:30-13:45 LUNCH  
13:45-15:00 Session 3 Benchmarking & Modeling
    Scientific Applications vs. SPEC-FP: A Comparison of Program Behavior
    The Exigency of Benchmark and Compiler Drift: Designing Tomorrow’s Processors with Yesterday’s Tools
    Accurate Memory Data Flow Modeling in Statistical Simulation
15:00-15:10 Coffee Break  
15:10-16:25 Session 4 I/O - Communication
    Efficient Remote Block-level I/O over an RDMA-capable NIC
    A Scalable Communication Layer for Multi-Dimensional Hyper Crossbar Network Using Multiple Gigabit Ethernet
    Large Files, Small Writes, and pNFS
16:25-16:35 Coffee Break  
16:35-17:50 Session 5 High Performance Computing - Supercomputing
    A Case for High Performance Computing with Virtual Machines
    Implementing Virtual Memory in a Vector Processor with Software Restart Markers
    Multigrid and Gauss-Seidel Smoothers Revisited: Parallelization on Chip Multiprocessors
8:30-9:30 KeyNote 2 Quantum Mechanical Approaches to Information Processing
9:30-10:45 Session 6 Power-Performance
    Online Power-Performance Adaptation of Multithreaded Programs using Hardware Event-Based Prediction
    A Scalable Low Power Issue Queue for Large Instruction Window Processors
    Design Space Exploration for Multicore Architectures: A Power/Performance/Thermal View
10:45-10:55 Coffee Break  
10:55-12:35 Session 7 Multicore Interconnection/Communication
    Design Tradeoffs for Tiled CMP On-Chip Networks
    STAR-MPI: Self Tuned Adaptive Routines for MPI Collective Operations
    Scaling MPI to short-memory MPPs such as BG/L
    Scalable, Fault Tolerant Membership for MPI Tasks on HPC Systems
12:35   Green Island Great Barrier Reef (Boarding commences 12:30 - 10 minutes walk to harbour)
19:00   Banquet at Tjapukai
8:30-9:45 Session 8 Memory I
    Coupling Prefix Caching and Collective Downloads for Remote Dataset Access
    Heterogeneous Way-Size Cache
    Profitable Loop Fusion and Tiling Using Model-driven Empirical Search
9:45-10:00 Coffee Break  
10:00-11:15 Session 9 Memory II
    TMA: A Trap-Based Memory Architecture
    Scalable Algorithms for Global Snapshots in Distributed Systems
    Feedback-directed Memory Disambiguation Through Store Distance Analysis
11:15-11:25 Coffee Break  
11:25-12:40 Session 10 Applications
    Accelerator Design for Protein Sequence HMM Search
    A Distributed System Based on Web Services for Computational Science Simulations
    Accelerating Sparse Matrix Computations via Data Compression
12:40-14:00 LUNCH  
14:00-15:15 Session 11 Miscellaneous
    Sensitivity Analysis of Knapsack-based Task Scheduling on the Grid
    Probabilistic Accuracy Bounds for Fault-Tolerant Computations that Discard Tasks
    Violated Dependence Amalysis
15:15-15:30 Coffee Break  
15:30-16:45 Session 12 Scheduling & Mapping
    User-Guided Symbiotic Space-Sharing of Real Workloads
    MPIPP: An Automatic Profile-guided Parallel Process Placement Toolset in SMP Clusters and Multiclusters
    Lightweight Lock-Free Synchronization Methods for Multithreading
16:45-17:00 Conf. Close  
    Workhsops and Tutorials